This invention relates generally to simultaneous processing of computer instructions, and more particularly to simultaneous thread sharing across execution resources of multiple processor cores.
Dual-core processors provide double the processor functional units that can potentially be computationally utilized to execute computer instructions as compared to single core processors. As the number of cores is increased by a factor of “n”, more instructions can be executed in parallel in the same processor. In n-core processor architectures, each processor core typically has dedicated instruction-sequencing units and execution units such that each processor core can operate independent of the other core. However, current n-core architectures do not utilize resources across the processor cores.
Multi-threaded systems may schedule and coordinate execution of multiple threads on separate processor cores. As additional processor cores are added to multi-core processor architectures, legacy software often must be rewritten or modified to utilize the additional processor cores. Each processor core typically includes a number of execution units, such as one or more fixed-point units, floating-point units, and branching units. The time required to execute instructions on different execution units in the same processor core may vary. Some techniques, such as simultaneous multithreading, can increase processing efficiency by executing instructions from more than one thread in different pipeline stages of the same processor core at the same time. Such techniques may improve processing throughput, but some execution units can still remain idle.